patch-2.4.15 linux/include/asm-sparc64/io.h

• Lines: 314
• Date: Tue Nov 13 09:16:05 2001
• Orig file: v2.4.14/linux/include/asm-sparc64/io.h
• Orig date: Sun Sep 17 09:50:02 2000

diff -u --recursive --new-file v2.4.14/linux/include/asm-sparc64/io.h linux/include/asm-sparc64/io.h
@@ -1,4 +1,4 @@
-/* $Id: io.h,v 1.36 2000/09/17 05:12:00 davem Exp $ */
+/* $Id: io.h,v 1.40 2001/11/10 09:24:56 davem Exp $ */
 #ifndef __SPARC64_IO_H
 #define __SPARC64_IO_H
 
@@ -26,9 +26,9 @@
 
 #define bus_dvma_to_mem(__vaddr) ((__vaddr) & pci_memspace_mask)
 
-extern __inline__ unsigned int inb(unsigned long addr)
+static __inline__ u8 inb(unsigned long addr)
 {
-	unsigned int ret;
+	u8 ret;
 
 	__asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_inb */"
 			     : "=r" (ret)
@@ -37,9 +37,9 @@
 	return ret;
 }
 
-extern __inline__ unsigned int inw(unsigned long addr)
+static __inline__ u16 inw(unsigned long addr)
 {
-	unsigned int ret;
+	u16 ret;
 
 	__asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_inw */"
 			     : "=r" (ret)
@@ -48,9 +48,9 @@
 	return ret;
 }
 
-extern __inline__ unsigned int inl(unsigned long addr)
+static __inline__ u32 inl(unsigned long addr)
 {
-	unsigned int ret;
+	u32 ret;
 
 	__asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_inl */"
 			     : "=r" (ret)
@@ -59,21 +59,21 @@
 	return ret;
 }
 
-extern __inline__ void outb(unsigned char b, unsigned long addr)
+static __inline__ void outb(u8 b, unsigned long addr)
 {
 	__asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_outb */"
 			     : /* no outputs */
 			     : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
 }
 
-extern __inline__ void outw(unsigned short w, unsigned long addr)
+static __inline__ void outw(u16 w, unsigned long addr)
 {
 	__asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_outw */"
 			     : /* no outputs */
 			     : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
 }
 
-extern __inline__ void outl(unsigned int l, unsigned long addr)
+static __inline__ void outl(u32 l, unsigned long addr)
 {
 	__asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_outl */"
 			     : /* no outputs */
@@ -95,9 +95,9 @@
 extern void insl(unsigned long addr, void *dst, unsigned long count);
 
 /* Memory functions, same as I/O accesses on Ultra. */
-extern __inline__ unsigned int _readb(unsigned long addr)
+static __inline__ u8 _readb(unsigned long addr)
 {
-	unsigned int ret;
+	u8 ret;
 
 	__asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_readb */"
 			     : "=r" (ret)
@@ -106,9 +106,9 @@
 	return ret;
 }
 
-extern __inline__ unsigned int _readw(unsigned long addr)
+static __inline__ u16 _readw(unsigned long addr)
 {
-	unsigned int ret;
+	u16 ret;
 
 	__asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_readw */"
 			     : "=r" (ret)
@@ -117,9 +117,9 @@
 	return ret;
 }
 
-extern __inline__ unsigned int _readl(unsigned long addr)
+static __inline__ u32 _readl(unsigned long addr)
 {
-	unsigned int ret;
+	u32 ret;
 
 	__asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_readl */"
 			     : "=r" (ret)
@@ -128,38 +128,58 @@
 	return ret;
 }
 
-extern __inline__ void _writeb(unsigned char b, unsigned long addr)
+static __inline__ u64 _readq(unsigned long addr)
+{
+	u64 ret;
+
+	__asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_readq */"
+			     : "=r" (ret)
+			     : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
+
+	return ret;
+}
+
+static __inline__ void _writeb(u8 b, unsigned long addr)
 {
 	__asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_writeb */"
 			     : /* no outputs */
 			     : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
 }
 
-extern __inline__ void _writew(unsigned short w, unsigned long addr)
+static __inline__ void _writew(u16 w, unsigned long addr)
 {
 	__asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_writew */"
 			     : /* no outputs */
 			     : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
 }
 
-extern __inline__ void _writel(unsigned int l, unsigned long addr)
+static __inline__ void _writel(u32 l, unsigned long addr)
 {
 	__asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_writel */"
 			     : /* no outputs */
 			     : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
 }
 
+static __inline__ void _writeq(u64 q, unsigned long addr)
+{
+	__asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_writeq */"
+			     : /* no outputs */
+			     : "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
+}
+
 #define readb(__addr)		(_readb((unsigned long)(__addr)))
 #define readw(__addr)		(_readw((unsigned long)(__addr)))
 #define readl(__addr)		(_readl((unsigned long)(__addr)))
-#define writeb(__b, __addr)	(_writeb((__b), (unsigned long)(__addr)))
-#define writew(__w, __addr)	(_writew((__w), (unsigned long)(__addr)))
-#define writel(__l, __addr)	(_writel((__l), (unsigned long)(__addr)))
+#define readq(__addr)		(_readq((unsigned long)(__addr)))
+#define writeb(__b, __addr)	(_writeb((u8)(__b), (unsigned long)(__addr)))
+#define writew(__w, __addr)	(_writew((u16)(__w), (unsigned long)(__addr)))
+#define writel(__l, __addr)	(_writel((u32)(__l), (unsigned long)(__addr)))
+#define writeq(__q, __addr)	(_writeq((u64)(__q), (unsigned long)(__addr)))
 
 /* Now versions without byte-swapping. */
-extern __inline__ unsigned int _raw_readb(unsigned long addr)
+static __inline__ u8 _raw_readb(unsigned long addr)
 {
-	unsigned int ret;
+	u8 ret;
 
 	__asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_raw_readb */"
 			     : "=r" (ret)
@@ -168,9 +188,9 @@
 	return ret;
 }
 
-extern __inline__ unsigned int _raw_readw(unsigned long addr)
+static __inline__ u16 _raw_readw(unsigned long addr)
 {
-	unsigned int ret;
+	u16 ret;
 
 	__asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_raw_readw */"
 			     : "=r" (ret)
@@ -179,9 +199,9 @@
 	return ret;
 }
 
-extern __inline__ unsigned int _raw_readl(unsigned long addr)
+static __inline__ u32 _raw_readl(unsigned long addr)
 {
-	unsigned int ret;
+	u32 ret;
 
 	__asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_raw_readl */"
 			     : "=r" (ret)
@@ -190,33 +210,52 @@
 	return ret;
 }
 
-extern __inline__ void _raw_writeb(unsigned char b, unsigned long addr)
+static __inline__ u64 _raw_readq(unsigned long addr)
+{
+	u64 ret;
+
+	__asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_raw_readq */"
+			     : "=r" (ret)
+			     : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+
+	return ret;
+}
+
+static __inline__ void _raw_writeb(u8 b, unsigned long addr)
 {
 	__asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_raw_writeb */"
 			     : /* no outputs */
 			     : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
 }
 
-extern __inline__ void _raw_writew(unsigned short w, unsigned long addr)
+static __inline__ void _raw_writew(u16 w, unsigned long addr)
 {
 	__asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_raw_writew */"
 			     : /* no outputs */
 			     : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
 }
 
-extern __inline__ void _raw_writel(unsigned int l, unsigned long addr)
+static __inline__ void _raw_writel(u32 l, unsigned long addr)
 {
 	__asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_raw_writel */"
 			     : /* no outputs */
 			     : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
 }
 
+static __inline__ void _raw_writeq(u64 q, unsigned long addr)
+{
+	__asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_raw_writeq */"
+			     : /* no outputs */
+			     : "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+}
+
 #define __raw_readb(__addr)		(_raw_readb((unsigned long)(__addr)))
 #define __raw_readw(__addr)		(_raw_readw((unsigned long)(__addr)))
 #define __raw_readl(__addr)		(_raw_readl((unsigned long)(__addr)))
-#define __raw_writeb(__b, __addr)	(_raw_writeb((__b), (unsigned long)(__addr)))
-#define __raw_writew(__w, __addr)	(_raw_writew((__w), (unsigned long)(__addr)))
-#define __raw_writel(__l, __addr)	(_raw_writel((__l), (unsigned long)(__addr)))
+#define __raw_writeb(__b, __addr)	(_raw_writeb((u8)(__b), (unsigned long)(__addr)))
+#define __raw_writew(__w, __addr)	(_raw_writew((u16)(__w), (unsigned long)(__addr)))
+#define __raw_writel(__l, __addr)	(_raw_writel((u32)(__l), (unsigned long)(__addr)))
+#define __raw_writeq(__q, __addr)	(_raw_writeq((u64)(__q), (unsigned long)(__addr)))
 
 /* Valid I/O Space regions are anywhere, because each PCI bus supported
  * can live in an arbitrary area of the physical address range.
@@ -226,9 +265,9 @@
 /* Now, SBUS variants, only difference from PCI is that we do
  * not use little-endian ASIs.
  */
-extern __inline__ unsigned int _sbus_readb(unsigned long addr)
+static __inline__ u8 _sbus_readb(unsigned long addr)
 {
-	unsigned int ret;
+	u8 ret;
 
 	__asm__ __volatile__("lduba\t[%1] %2, %0\t/* sbus_readb */"
 			     : "=r" (ret)
@@ -237,9 +276,9 @@
 	return ret;
 }
 
-extern __inline__ unsigned int _sbus_readw(unsigned long addr)
+static __inline__ u16 _sbus_readw(unsigned long addr)
 {
-	unsigned int ret;
+	u16 ret;
 
 	__asm__ __volatile__("lduha\t[%1] %2, %0\t/* sbus_readw */"
 			     : "=r" (ret)
@@ -248,9 +287,9 @@
 	return ret;
 }
 
-extern __inline__ unsigned int _sbus_readl(unsigned long addr)
+static __inline__ u32 _sbus_readl(unsigned long addr)
 {
-	unsigned int ret;
+	u32 ret;
 
 	__asm__ __volatile__("lduwa\t[%1] %2, %0\t/* sbus_readl */"
 			     : "=r" (ret)
@@ -259,21 +298,21 @@
 	return ret;
 }
 
-extern __inline__ void _sbus_writeb(unsigned char b, unsigned long addr)
+static __inline__ void _sbus_writeb(u8 b, unsigned long addr)
 {
 	__asm__ __volatile__("stba\t%r0, [%1] %2\t/* sbus_writeb */"
 			     : /* no outputs */
 			     : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
 }
 
-extern __inline__ void _sbus_writew(unsigned short w, unsigned long addr)
+static __inline__ void _sbus_writew(u16 w, unsigned long addr)
 {
 	__asm__ __volatile__("stha\t%r0, [%1] %2\t/* sbus_writew */"
 			     : /* no outputs */
 			     : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
 }
 
-extern __inline__ void _sbus_writel(unsigned int l, unsigned long addr)
+static __inline__ void _sbus_writel(u32 l, unsigned long addr)
 {
 	__asm__ __volatile__("stwa\t%r0, [%1] %2\t/* sbus_writel */"
 			     : /* no outputs */